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Merge pull request #419 from sbutz/stimecmp
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riscv: Add stimecmp CSR
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Merge pull request #413 from JurajSadel/upstream/sdtrig-stubs
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riscv: add Sdtrig CSRs as raw usize accessors
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Merge pull request #416 from JurajSadel/upstream/csr-raw-bits-as-usize
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riscv: use CSR immediate instructions for set_csr!/clear_csr! field masks
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riscv: extend raw bit access to the _as_usize CSR modules
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Merge pull request #415 from JurajSadel/upstream/csr-raw-bits-typed
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Merge pull request #409 from KushalMeghani1644/fix-408
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riscv: add misa write side
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Merge pull request #406 from sbutz/sireg
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