[Sparc] poor codegen for 4-byte-aligned 8-byte load

[folkertdev]

A 4-byte aligned 8-byte load optimizes much less well than 2 4-byte loads on sparc-unknown-linux-gnu.

https://godbolt.org/z/Wxza9Kjq9

typedef long long __attribute__((aligned(4))) underaligned;

long long bad(const underaligned *p) {
    return *p;
}

long long good(const unsigned *p) {
    return (unsigned long long)p[0] << 32 | p[1];
}

bad:
        add %sp, -104, %sp
        ld [%o0+4], %o1
        add %sp, 96, %o2
        or %o2, 4, %o2
        st %o1, [%o2]
        ld [%o0], %o0
        st %o0, [%sp+96]
        ldd [%sp+96], %o0
        retl
        add %sp, 104, %sp

good:
        ld [%o0], %o2
        ld [%o0+4], %o1
        retl
        mov     %o2, %o0

[llvmorg-github-actions]

@llvm/issue-subscribers-backend-powerpc

Author: Folkert de Vries (folkertdev)

Details

A 4-byte aligned 8-byte load optimizes much less well than 2 4-byte loads on `sparc-unknown-linux-gnu`.

https://godbolt.org/z/Wxza9Kjq9

typedef long long __attribute__((aligned(4))) underaligned;

long long bad(const underaligned *p) {
    return *p;
}

long long good(const unsigned *p) {
    return (unsigned long long)p[0] << 32 | p[1];
}

bad:
        add %sp, -104, %sp
        ld [%o0+4], %o1
        add %sp, 96, %o2
        or %o2, 4, %o2
        st %o1, [%o2]
        ld [%o0], %o0
        st %o0, [%sp+96]
        ldd [%sp+96], %o0
        retl
        add %sp, 104, %sp

good:
        ld [%o0], %o2
        ld [%o0+4], %o1
        retl
        mov     %o2, %o0

[brad0]

cc @koachan