Added port for the OpenHW CORE-V MCU platform#535
Merged
Conversation
Adds a complete ThreadX port for the OpenHW CORE-V MCU SoC, targeting
the Digilent Nexys A7 FPGA board with an Ashling Opella LD debug probe.
New files
---------
cmake/riscv64-gcc-rv32imc.cmake
CMake toolchain file for riscv64-unknown-elf-gcc targeting rv32imc_zicsr/ilp32.
ports/risc-v32/gnu/example_build/core_v_mcu/
Full BSP + demo application:
Assembly
crt0.S C runtime startup (BSS clear, GP/SP init, call main)
vectors.S 32-entry vectored interrupt table at 0x1c000800
tx_initialize_low_level.S mtvec setup (vectored mode), stack/free-mem pointers
BSP drivers (bsp/)
system_core_v_mcu.c Top-level init and ISR dispatcher (isr_table[32])
irq.c PULP APB interrupt controller (enable/disable/mask)
timer_irq.c PULP FC Timer — 100 Hz tick from 32 kHz ref clock
fll.c Frequency Locked Loop — 5 MHz → 50 MHz (FPGA)
uart_driver.c UDMA UART channel 0 — polled TX, non-blocking RX
gpio.c PULP GPIO — set/clear/toggle by pin mask
string.c Freestanding memset/memcpy shim (no newlib)
Headers (include/)
Peripheral register maps, MMIO inlines, BSP API declarations, tx_user.h
Application
demo_threadx.c Two threads: blinky (LED pin 5, 1 Hz) + UART heartbeat
link.ld Linker script: .vectors@0x1c000800, .text@0x1c000880
CMakeLists.txt Build definition (references THREADX_ROOT)
build.sh One-shot CMake+Ninja build script
Debug
openocd-nexys-Ashling-Opella-LD.cfg OpenOCD config for Opella LD over JTAG
gdb_init GDB startup script (connect, load, break main)
Tests (tests/)
test_irq.c / test_timer.c Host-compiled unit tests (2/2 pass)
mock/mmio_mock.* Software MMIO register map for host testing
Documentation
README.md Hardware overview, build, flash/debug, BSP API reference
Architecture notes
------------------
- CV32E40P uses PULP/PULPissimo interrupt controller (not CLINT); individual
IRQ lines are masked via APB registers, not mie CSR.
- mtvec must be 256-byte aligned; vectors placed at 0x1c000800 (vectored mode).
- Timer IRQ = line 10; dispatch via isr_table[mcause & 0x1f].
- Build: -march=rv32imc_zicsr -mabi=ilp32, -ffreestanding, -nodefaultlibs.
- Verified: ELF 11 KB text, sections at correct addresses, unit tests pass.
Third-party attributions
------------------------
BSP files derived from core-v-freertos (Apache-2.0):
© 2019-2020 ETH Zurich and University of Bologna
© 2020 GreenWaves Technologies
© 2011-2014 Wind River Systems, Inc.
© 2017 SiFive Inc. (crt0.S, BSD-2-Clause portions)
All original copyright notices retained; see individual file headers.
SPDX: Apache-2.0 AND MIT (crt0.S: (Apache-2.0 OR BSD-2-Clause) AND MIT).
Co-authored-by: Copilot <223556219+Copilot@users.noreply.github.com>
- Added install_deps.sh to automate toolchain/OpenOCD dependency setup - Added deploy.sh for one-step GDB flashing via Ashling Opella-LD - Added gdb-multiarch fallback when riscv64-unknown-elf-gdb is absent - Suppressed spurious GDB warnings in flash mode - Documented --wsl flag required by usbipd-win v5.x Co-authored-by: Copilot <223556219+Copilot@users.noreply.github.com>
… width - Rewrote GPIO driver to match apb_gpiov2 pin-indexed register interface; SETGPIO/CLRGPIO/TOGGPIO/SETDIR all take a pin number, not a bitmask - Fixed pad-mux to use per-pad indexed registers at APB_SOC_CTRL + 0x400 + pad*4 (new apb_soc_ctrl v1.0.0 layout; old PADFUN0/1 layout was wrong) - Fixed FUNC_C (value 2) routes pad to GPIO/apbio; corrected io_pad offset (io_pad = gpio_pin + 7, verified in pad_control.sv) - Fixed timer CMP to use ARCHI_SOC_FREQUENCY (10 MHz, FC_CLK_PERIOD_NS=100) instead of the 32 kHz slow clock; CMP = 10000000 / 100 = 100000 - Added ARCHI_SOC_FREQUENCY = 10000000U to properties.h - Fixed UART DMA transfer width to match apb_uart 8-bit UDMA interface - Fixed tx_thread_context_restore.S: restore mscratch before mret to prevent context corruption on nested interrupts Co-authored-by: Copilot <223556219+Copilot@users.noreply.github.com>
- Added startup banner assembled at compile time from tx_api.h version constants (THREADX_MAJOR/MINOR/PATCH/BUILD_VERSION) - Blinks LED[0] (IO pad 11, GPIO pin 4, MUX=2) at 1 Hz; this is the only LED wired to CORE-V MCU GPIO in the 2023-08-27 Nexys A7 pre-built bitfile - UART thread prints a dot every second to confirm scheduler is running - Banner credits: 'Eclipse ThreadX for OpenHW CORE-V MCU vX.Y.Z.BBBBB' Co-authored-by: Copilot <223556219+Copilot@users.noreply.github.com>
- Added gpio_setpinmux(io_pad, mux) and gpio_getpinmux(io_pad) for arbitrary pad-mux control (any mux value 0-3, any io_pad) - Added gpio_pin_set_dir(pin, dir) for per-pin direction control (0=input, 1=push-pull output) without requiring a bitmask caller - Added gpio_pin_read_status(pin) that writes SETSEL and reads RDSTAT, returning the full pin status word used by the CLI gpio status command - Made APB_SOC_PADMUX_BASE and GPIO_IO_PAD_OFFSET module-level constants (no semantic change) so that gpio_setpinmux can use the same base Co-authored-by: Copilot <223556219+Copilot@users.noreply.github.com>
Co-authored-by: Copilot <223556219+Copilot@users.noreply.github.com>
Co-authored-by: Copilot <223556219+Copilot@users.noreply.github.com>
Co-authored-by: Copilot <223556219+Copilot@users.noreply.github.com>
This file contains hidden or bidirectional Unicode text that may be interpreted or compiled differently than what appears below. To review, open the file in an editor that reveals hidden Unicode characters.
Learn more about bidirectional Unicode characters
Sign up for free
to join this conversation on GitHub.
Already have an account?
Sign in to comment
1 participant
Add this suggestion to a batch that can be applied as a single commit.This suggestion is invalid because no changes were made to the code.Suggestions cannot be applied while the pull request is closed.Suggestions cannot be applied while viewing a subset of changes.Only one suggestion per line can be applied in a batch.Add this suggestion to a batch that can be applied as a single commit.Applying suggestions on deleted lines is not supported.You must change the existing code in this line in order to create a valid suggestion.Outdated suggestions cannot be applied.This suggestion has been applied or marked resolved.Suggestions cannot be applied from pending reviews.Suggestions cannot be applied on multi-line comments.Suggestions cannot be applied while the pull request is queued to merge.Suggestion cannot be applied right now. Please check back later.
PR checklist