Name		Name	Last commit message	Last commit date
certification		certification
configuration		configuration
doc		doc
lifecycle		lifecycle
model		model
quality		quality
requirements		requirements
rtl		rtl
sim		sim
synthesis/verilog/dnc		synthesis/verilog/dnc
template/real		template/real
validation		validation
verification		verification
LICENSE		LICENSE
README.md		README.md
icon.jpg		icon.jpg
settings64_ghdl.bat		settings64_ghdl.bat
settings64_iverilog.bat		settings64_iverilog.bat
settings64_msim.bat		settings64_msim.bat
settings64_msim.sh		settings64_msim.sh
settings64_verilator.bat		settings64_verilator.bat
settings64_vivado.bat		settings64_vivado.bat
settings64_vivado.sh		settings64_vivado.sh
settings64_yosys.bat		settings64_yosys.bat
soc-dnc.svg		soc-dnc.svg
tag.sh		tag.sh
upload.sh		upload.sh

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SoC-DNC

QueenField

Differentiable Neural Computer for a System on Chip verified with UVM/OSVVM/FV

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Differentiable Neural Computer for a System on Chip verified with UVM/OSVVM/FV

differentiable-neural-computer neural-network neural-turing-machine soc

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