Timeloop Docker Tutorial Exercise 03: DDR Depth Configuration Missing Leading to Error

[ywlywl6]

I'm encountering an issue while running Timeloop's tutorial exercises using Docker. Exercises 00, 01, and 02 run fine, but starting from Exercise 03, due to the introduction of LPDDR, the system prompts me to add depth for DDR. However, according to the code provided by Timeloop, DDR does not seem to require a depth parameter.
`docker% pwd
/home/workspace/tutorial_exercises/01_accelergy_timeloop_2020_ispass/timeloop
docker% python3 run_example.py 03_bypass

================================================================================
Calling exercise 03_bypass. Code is:
def run_exercise_03_bypass(out_dir: str = "output"):
start_dir = os.path.join(THIS_SCRIPT_DIR, "03-model-conv1d+oc-3level")
# Output stationary tiled
spec = tl.Specification.from_yaml_files(
os.path.join(start_dir, "arch/.yaml"),
os.path.join(start_dir, "map/conv1d+oc-3level-bypass.map.yaml"),
os.path.join(start_dir, "prob/.yaml"),
)
tl.call_model(spec, output_dir=os.path.join(start_dir, f"{out_dir}/bypass"))

Traceback (most recent call last):
File "/usr/local/lib/python3.10/dist-packages/pytimeloop/timeloopfe/common/nodes.py", line 134, in cast_check_type
casted = self.cast(value)
File "/usr/local/lib/python3.10/dist-packages/pytimeloop/timeloopfe/common/nodes.py", line 182, in cast
value = self.callfunc(value)
File "/usr/local/lib/python3.10/dist-packages/pytimeloop/timeloopfe/common/nodes.py", line 96, in callfunc
return rt(x, __node_skip_parse=__node_skip_parse)
File "/usr/local/lib/python3.10/dist-packages/pytimeloop/timeloopfe/v4/arch.py", line 560, in init
super().init(*args, **kwargs)
File "/usr/local/lib/python3.10/dist-packages/pytimeloop/timeloopfe/v4/arch.py", line 467, in init
super().init(*args, **kwargs)
File "/usr/local/lib/python3.10/dist-packages/pytimeloop/timeloopfe/common/nodes.py", line 1221, in init
self._parse_elems()
File "/usr/local/lib/python3.10/dist-packages/pytimeloop/timeloopfe/common/nodes.py", line 549, in _parse_elems
self._parse_elem(k, check)
File "/usr/local/lib/python3.10/dist-packages/pytimeloop/timeloopfe/common/nodes.py", line 502, in _parse_elem
raise KeyError(
KeyError: 'Missing required key "depth" in StorageAttributes={'entries': REQUIRED, 'sizeKB': REQUIRED, 'reducti.... Required keys not found: depth. Found keys: width, datawidth, has_power_gating, power_gated_at, technology, n_banks, block_size, cluster_size.'

The above exception was the direct cause of the following exception:

Traceback (most recent call last):
File "/usr/local/lib/python3.10/dist-packages/pytimeloop/timeloopfe/common/nodes.py", line 134, in cast_check_type
casted = self.cast(value)
File "/usr/local/lib/python3.10/dist-packages/pytimeloop/timeloopfe/common/nodes.py", line 182, in cast
value = self.callfunc(value)
File "/usr/local/lib/python3.10/dist-packages/pytimeloop/timeloopfe/v4/arch.py", line 659, in component_factory
return target(**kwargs)
File "/usr/local/lib/python3.10/dist-packages/pytimeloop/timeloopfe/v4/arch.py", line 384, in init
super().init(self, *args, **kwargs)
File "/usr/local/lib/python3.10/dist-packages/pytimeloop/timeloopfe/v4/arch.py", line 335, in init
super().init(*args, **kwargs)
File "/usr/local/lib/python3.10/dist-packages/pytimeloop/timeloopfe/v4/arch.py", line 270, in init
super().init(*args, **kwargs)
File "/usr/local/lib/python3.10/dist-packages/pytimeloop/timeloopfe/v4/arch.py", line 33, in init
super().init(*args, **kwargs)
File "/usr/local/lib/python3.10/dist-packages/pytimeloop/timeloopfe/common/nodes.py", line 1221, in init
self._parse_elems()
File "/usr/local/lib/python3.10/dist-packages/pytimeloop/timeloopfe/common/nodes.py", line 549, in _parse_elems
self._parse_elem(k, check)
File "/usr/local/lib/python3.10/dist-packages/pytimeloop/timeloopfe/common/nodes.py", line 526, in _parse_elem
v = check.cast_check_type(v, self, key)
File "/usr/local/lib/python3.10/dist-packages/pytimeloop/timeloopfe/common/nodes.py", line 171, in cast_check_type
raise new_exc from exc
pytimeloop.timeloopfe.common.nodes.ParseError: Error calling cast function "StorageAttributes" for value "{'width': 256, 'datawidth': 8}" in Storage(MainMemory)[attributes].

'Missing required key "depth" in StorageAttributes={'entries': REQUIRED, 'sizeKB': REQUIRED, 'reducti.... Required keys not found: depth. Found keys: width, datawidth, has_power_gating, power_gated_at, technology, n_banks, block_size, cluster_size.'. 'Missing required key "depth" in StorageAttributes={'entries': REQUIRED, 'sizeKB': REQUIRED, 'reducti.... Required keys not found: depth. Found keys: width, datawidth, has_power_gating, power_gated_at, technology, n_banks, block_size, cluster_size.'

The above exception was the direct cause of the following exception:

Traceback (most recent call last):
File "/usr/local/lib/python3.10/dist-packages/pytimeloop/timeloopfe/common/nodes.py", line 134, in cast_check_type
casted = self.cast(value)
File "/usr/local/lib/python3.10/dist-packages/pytimeloop/timeloopfe/common/nodes.py", line 182, in cast
value = self.callfunc(value)
File "/usr/local/lib/python3.10/dist-packages/pytimeloop/timeloopfe/common/nodes.py", line 96, in callfunc
return rt(x, __node_skip_parse=__node_skip_parse)
File "/usr/local/lib/python3.10/dist-packages/pytimeloop/timeloopfe/v4/arch.py", line 116, in init
super().init(*args, **kwargs)
File "/usr/local/lib/python3.10/dist-packages/pytimeloop/timeloopfe/v4/arch.py", line 33, in init
super().init(*args, **kwargs)
File "/usr/local/lib/python3.10/dist-packages/pytimeloop/timeloopfe/common/nodes.py", line 1159, in init
self._parse_elems()
File "/usr/local/lib/python3.10/dist-packages/pytimeloop/timeloopfe/common/nodes.py", line 549, in _parse_elems
self._parse_elem(k, check)
File "/usr/local/lib/python3.10/dist-packages/pytimeloop/timeloopfe/common/nodes.py", line 526, in _parse_elem
v = check.cast_check_type(v, self, key)
File "/usr/local/lib/python3.10/dist-packages/pytimeloop/timeloopfe/common/nodes.py", line 171, in cast_check_type
raise new_exc from exc
pytimeloop.timeloopfe.common.nodes.ParseError: Error calling cast function "component_factory" for value "{'name': 'MainMemory', 'class': 'DRAM', 'attributes': {'width': 256, 'datawidth': 8}}" in ArchNodes[1].

'Missing required key "depth" in StorageAttributes={'entries': REQUIRED, 'sizeKB': REQUIRED, 'reducti.... Required keys not found: depth. Found keys: width, datawidth, has_power_gating, power_gated_at, technology, n_banks, block_size, cluster_size.'. Error calling cast function "StorageAttributes" for value "{'width': 256, 'datawidth': 8}" in Storage(MainMemory)[attributes].

'Missing required key "depth" in StorageAttributes={'entries': REQUIRED, 'sizeKB': REQUIRED, 'reducti.... Required keys not found: depth. Found keys: width, datawidth, has_power_gating, power_gated_at, technology, n_banks, block_size, cluster_size.'. 'Missing required key "depth" in StorageAttributes={'entries': REQUIRED, 'sizeKB': REQUIRED, 'reducti.... Required keys not found: depth. Found keys: width, datawidth, has_power_gating, power_gated_at, technology, n_banks, block_size, cluster_size.'

The above exception was the direct cause of the following exception:

Traceback (most recent call last):
File "/usr/local/lib/python3.10/dist-packages/pytimeloop/timeloopfe/common/nodes.py", line 134, in cast_check_type
casted = self.cast(value)
File "/usr/local/lib/python3.10/dist-packages/pytimeloop/timeloopfe/common/nodes.py", line 182, in cast
value = self.callfunc(value)
File "/usr/local/lib/python3.10/dist-packages/pytimeloop/timeloopfe/common/nodes.py", line 96, in callfunc
return rt(x, __node_skip_parse=__node_skip_parse)
File "/usr/local/lib/python3.10/dist-packages/pytimeloop/timeloopfe/v4/arch.py", line 235, in init
super().init(*args, **kwargs)
File "/usr/local/lib/python3.10/dist-packages/pytimeloop/timeloopfe/v4/arch.py", line 184, in init
super().init(*args, **kwargs)
File "/usr/local/lib/python3.10/dist-packages/pytimeloop/timeloopfe/v4/arch.py", line 33, in init
super().init(*args, **kwargs)
File "/usr/local/lib/python3.10/dist-packages/pytimeloop/timeloopfe/common/nodes.py", line 1221, in init
self._parse_elems()
File "/usr/local/lib/python3.10/dist-packages/pytimeloop/timeloopfe/common/nodes.py", line 549, in _parse_elems
self._parse_elem(k, check)
File "/usr/local/lib/python3.10/dist-packages/pytimeloop/timeloopfe/common/nodes.py", line 526, in _parse_elem
v = check.cast_check_type(v, self, key)
File "/usr/local/lib/python3.10/dist-packages/pytimeloop/timeloopfe/common/nodes.py", line 171, in cast_check_type
raise new_exc from exc
pytimeloop.timeloopfe.common.nodes.ParseError: Error calling cast function "ArchNodes" for value "[{'name': 'System', 'attributes': {'technology': '40nm', 'global_cycle_seconds': 1e-09}}, {'name': 'MainMemory', 'class': 'DRAM', 'attributes': {'width': 256, 'datawidth': 8}}, {'name': 'GlobalBuffer', 'class': 'SRAM', 'attributes': {'depth': 32768, 'width': 64, 'datawidth': 8}}, {'name': 'PE'}, {'name': 'RegisterFile', 'class': 'regfile', 'attributes': {'depth': 64, 'width': 8, 'datawidth': 8}}, {'name': 'MACC', 'class': 'intmac', 'attributes': {'width': 8}}]" in Architecture[nodes].

'Missing required key "depth" in StorageAttributes={'entries': REQUIRED, 'sizeKB': REQUIRED, 'reducti.... Required keys not found: depth. Found keys: width, datawidth, has_power_gating, power_gated_at, technology, n_banks, block_size, cluster_size.'. Error calling cast function "component_factory" for value "{'name': 'MainMemory', 'class': 'DRAM', 'attributes': {'width': 256, 'datawidth': 8}}" in ArchNodes[1].

'Missing required key "depth" in StorageAttributes={'entries': REQUIRED, 'sizeKB': REQUIRED, 'reducti.... Required keys not found: depth. Found keys: width, datawidth, has_power_gating, power_gated_at, technology, n_banks, block_size, cluster_size.'. Error calling cast function "StorageAttributes" for value "{'width': 256, 'datawidth': 8}" in Storage(MainMemory)[attributes].

'Missing required key "depth" in StorageAttributes={'entries': REQUIRED, 'sizeKB': REQUIRED, 'reducti.... Required keys not found: depth. Found keys: width, datawidth, has_power_gating, power_gated_at, technology, n_banks, block_size, cluster_size.'. 'Missing required key "depth" in StorageAttributes={'entries': REQUIRED, 'sizeKB': REQUIRED, 'reducti.... Required keys not found: depth. Found keys: width, datawidth, has_power_gating, power_gated_at, technology, n_banks, block_size, cluster_size.'

The above exception was the direct cause of the following exception:

Traceback (most recent call last):
File "/home/workspace/tutorial_exercises/01_accelergy_timeloop_2020_ispass/timeloop/run_example.py", line 232, in
run(e)
File "/home/workspace/tutorial_exercises/01_accelergy_timeloop_2020_ispass/timeloop/run_example.py", line 225, in run
func()
File "/home/workspace/tutorial_exercises/01_accelergy_timeloop_2020_ispass/timeloop/run_example.py", line 90, in run_exercise_03_bypass
spec = tl.Specification.from_yaml_files(
File "/usr/local/lib/python3.10/dist-packages/pytimeloop/timeloopfe/common/base_specification.py", line 179, in from_yaml_files
return super().from_yaml_files(*args, **kwargs) # type: ignore
File "/usr/local/lib/python3.10/dist-packages/pytimeloop/timeloopfe/common/nodes.py", line 1356, in from_yaml_files
c = cls(**rval, **kwargs)
File "/usr/local/lib/python3.10/dist-packages/pytimeloop/timeloopfe/v4/specification.py", line 66, in init
super().init(*args, **kwargs)
File "/usr/local/lib/python3.10/dist-packages/pytimeloop/timeloopfe/common/base_specification.py", line 71, in init
super().init(*args, **kwargs)
File "/usr/local/lib/python3.10/dist-packages/pytimeloop/timeloopfe/common/nodes.py", line 1221, in init
self._parse_elems()
File "/usr/local/lib/python3.10/dist-packages/pytimeloop/timeloopfe/common/nodes.py", line 549, in _parse_elems
self._parse_elem(k, check)
File "/usr/local/lib/python3.10/dist-packages/pytimeloop/timeloopfe/common/nodes.py", line 526, in _parse_elem
v = check.cast_check_type(v, self, key)
File "/usr/local/lib/python3.10/dist-packages/pytimeloop/timeloopfe/common/nodes.py", line 171, in cast_check_type
raise new_exc from exc
pytimeloop.timeloopfe.common.nodes.ParseError: Error calling cast function "Architecture" for value "{'version': 0.4, 'nodes': [{'name': 'System', 'attributes': {'technology': '40nm', 'global_cycle_seconds': 1e-09}}, {'name': 'MainMemory', 'class': 'DRAM', 'attributes': {'width': 256, 'datawidth': 8}}, {'name': 'GlobalBuffer', 'class': 'SRAM', 'attributes': {'depth': 32768, 'width': 64, 'datawidth': 8}}, {'name': 'PE'}, {'name': 'RegisterFile', 'class': 'regfile', 'attributes': {'depth': 64, 'width': 8, 'datawidth': 8}}, {'name': 'MACC', 'class': 'intmac', 'attributes': {'width': 8}}]}" in Specification[architecture].

'Missing required key "depth" in StorageAttributes={'entries': REQUIRED, 'sizeKB': REQUIRED, 'reducti.... Required keys not found: depth. Found keys: width, datawidth, has_power_gating, power_gated_at, technology, n_banks, block_size, cluster_size.'. Error calling cast function "ArchNodes" for value "[{'name': 'System', 'attributes': {'technology': '40nm', 'global_cycle_seconds': 1e-09}}, {'name': 'MainMemory', 'class': 'DRAM', 'attributes': {'width': 256, 'datawidth': 8}}, {'name': 'GlobalBuffer', 'class': 'SRAM', 'attributes': {'depth': 32768, 'width': 64, 'datawidth': 8}}, {'name': 'PE'}, {'name': 'RegisterFile', 'class': 'regfile', 'attributes': {'depth': 64, 'width': 8, 'datawidth': 8}}, {'name': 'MACC', 'class': 'intmac', 'attributes': {'width': 8}}]" in Architecture[nodes].

'Missing required key "depth" in StorageAttributes={'entries': REQUIRED, 'sizeKB': REQUIRED, 'reducti.... Required keys not found: depth. Found keys: width, datawidth, has_power_gating, power_gated_at, technology, n_banks, block_size, cluster_size.'. Error calling cast function "component_factory" for value "{'name': 'MainMemory', 'class': 'DRAM', 'attributes': {'width': 256, 'datawidth': 8}}" in ArchNodes[1].

'Missing required key "depth" in StorageAttributes={'entries': REQUIRED, 'sizeKB': REQUIRED, 'reducti.... Required keys not found: depth. Found keys: width, datawidth, has_power_gating, power_gated_at, technology, n_banks, block_size, cluster_size.'. Error calling cast function "StorageAttributes" for value "{'width': 256, 'datawidth': 8}" in Storage(MainMemory)[attributes].

'Missing required key "depth" in StorageAttributes={'entries': REQUIRED, 'sizeKB': REQUIRED, 'reducti.... Required keys not found: depth. Found keys: width, datawidth, has_power_gating, power_gated_at, technology, n_banks, block_size, cluster_size.'. 'Missing required key "depth" in StorageAttributes={'entries': REQUIRED, 'sizeKB': REQUIRED, 'reducti.... Required keys not found: depth. Found keys: width, datawidth, has_power_gating, power_gated_at, technology, n_banks, block_size, cluster_size.'
docker% `

[ywlywl6]

I noticed that after manually adding the depth parameter to DDR, my program could run successfully. This leads me to suspect that the existing examples in workspace\tutorial_exercises\01_accelergy_timeloop_2020_ispass\timeloop and workspace\example_designs\example_designs might need adjustments. My initial assessment is that the latest framework likely enforces the requirement for all memories to include a depth property, and these examples haven't yet integrated this change.

[angshuman-parashar]

Could you please report this at https://github.com/Accelergy-Project/timeloop-python?

[1ucky2]

I noticed that after manually adding the depth parameter to DDR, my program could run successfully. This leads me to suspect that the existing examples in workspace\tutorial_exercises\01_accelergy_timeloop_2020_ispass\timeloop and workspace\example_designs\example_designs might need adjustments. My initial assessment is that the latest framework likely enforces the requirement for all memories to include a depth property, and these examples haven't yet integrated this change.

Could you please describe your description in details ？I have tried this
"- !Component # DRAM main memory
name: DRAM
class: DRAM
attributes:
type: "LPDDR4"
width: 64
datawidth: 8
depth: 8192 " ,but no use. The last line I modified in simba_like. Thank you!

[ywlywl6]

I noticed that after manually adding the depth parameter to DDR, my program could run successfully. This leads me to suspect that the existing examples in workspace\tutorial_exercises\01_accelergy_timeloop_2020_ispass\timeloop and workspace\example_designs\example_designs might need adjustments. My initial assessment is that the latest framework likely enforces the requirement for all memories to include a depth property, and these examples haven't yet integrated this change.

Could you please describe your description in details ？I have tried this "- !Component # DRAM main memory name: DRAM class: DRAM attributes: type: "LPDDR4" width: 64 datawidth: 8 depth: 8192 " ,but no use. The last line I modified in simba_like. Thank you!

I use“ depth: 1000000000”