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zengdagemr-c
zengdage
authored and
mr-c
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arm: fix some neon2rvv intrinsic function error
1. For vqdmlal_s16/s32: the doubling result maybe overflow, so need to use vqaddq_s16/32 to saturate it. As the same with vqdmlsl_s16/32. 2. The vrdmulh family function need to use vqadd saturating function to avoid the doubling result overflow. 3. The result of vrshl family function need to keep the sign bit of the origin data. If a > 0 && b < 0, the result of (a + (1 << (-b - 1))) maybe overflow into a negative value. And in gcc/clang, >> means the arithmetic shift left, so it will get the incorrect sign bit whithout unsigned extend value. Signed-off-by: Zhijin Zeng <zhijin.zeng@spacemit.com>
1 parent 416091e commit 2a548e5

11 files changed

Lines changed: 195 additions & 36 deletions

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‎simde/arm/neon/qdmlal.h‎

Lines changed: 6 additions & 11 deletions
Original file line numberDiff line numberDiff line change
@@ -31,6 +31,7 @@
3131
#include "mul.h"
3232
#include "mul_n.h"
3333
#include "movl.h"
34+
#include "qadd.h"
3435
#include "types.h"
3536

3637
HEDLEY_DIAGNOSTIC_PUSH
@@ -71,7 +72,8 @@ simde_vqdmlal_s16(simde_int32x4_t a, simde_int16x4_t b, simde_int16x4_t c) {
7172
#if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
7273
return vqdmlal_s16(a, b, c);
7374
#else
74-
return simde_vaddq_s32(simde_vmulq_n_s32(simde_vmulq_s32(simde_vmovl_s16(b), simde_vmovl_s16(c)), 2), a);
75+
simde_int32x4_t temp = simde_vmulq_s32(simde_vmovl_s16(b), simde_vmovl_s16(c));
76+
return simde_vqaddq_s32(simde_vqaddq_s32(temp, temp), a);
7577
#endif
7678
}
7779
#if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES)
@@ -85,17 +87,10 @@ simde_vqdmlal_s32(simde_int64x2_t a, simde_int32x2_t b, simde_int32x2_t c) {
8587
#if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
8688
return vqdmlal_s32(a, b, c);
8789
#else
88-
simde_int64x2_private r_ = simde_int64x2_to_private(
89-
simde_x_vmulq_s64(
90+
simde_int64x2_t r = simde_x_vmulq_s64(
9091
simde_vmovl_s32(b),
91-
simde_vmovl_s32(c)));
92-
93-
SIMDE_VECTORIZE
94-
for (size_t i = 0 ; i < (sizeof(r_.values) / sizeof(r_.values[0])) ; i++) {
95-
r_.values[i] = r_.values[i] * HEDLEY_STATIC_CAST(int64_t, 2);
96-
}
97-
98-
return simde_vaddq_s64(a, simde_int64x2_from_private(r_));
92+
simde_vmovl_s32(c));
93+
return simde_vqaddq_s64(a, simde_vqaddq_s64(r, r));
9994
#endif
10095
}
10196
#if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES)

‎simde/arm/neon/qdmlsl.h‎

Lines changed: 7 additions & 11 deletions
Original file line numberDiff line numberDiff line change
@@ -31,6 +31,8 @@
3131
#include "mul.h"
3232
#include "mul_n.h"
3333
#include "movl.h"
34+
#include "qadd.h"
35+
#include "qsub.h"
3436
#include "types.h"
3537

3638
HEDLEY_DIAGNOSTIC_PUSH
@@ -71,7 +73,8 @@ simde_vqdmlsl_s16(simde_int32x4_t a, simde_int16x4_t b, simde_int16x4_t c) {
7173
#if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
7274
return vqdmlsl_s16(a, b, c);
7375
#else
74-
return simde_vsubq_s32(a, simde_vmulq_n_s32(simde_vmulq_s32(simde_vmovl_s16(b), simde_vmovl_s16(c)), 2));
76+
simde_int32x4_t temp = simde_vmulq_s32(simde_vmovl_s16(b), simde_vmovl_s16(c));
77+
return simde_vqsubq_s32(a, simde_vqaddq_s32(temp, temp));
7578
#endif
7679
}
7780
#if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES)
@@ -85,17 +88,10 @@ simde_vqdmlsl_s32(simde_int64x2_t a, simde_int32x2_t b, simde_int32x2_t c) {
8588
#if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
8689
return vqdmlsl_s32(a, b, c);
8790
#else
88-
simde_int64x2_private r_ = simde_int64x2_to_private(
89-
simde_x_vmulq_s64(
91+
simde_int64x2_t r = simde_x_vmulq_s64(
9092
simde_vmovl_s32(b),
91-
simde_vmovl_s32(c)));
92-
93-
SIMDE_VECTORIZE
94-
for (size_t i = 0 ; i < (sizeof(r_.values) / sizeof(r_.values[0])) ; i++) {
95-
r_.values[i] = r_.values[i] * HEDLEY_STATIC_CAST(int64_t, 2);
96-
}
97-
98-
return simde_vsubq_s64(a, simde_int64x2_from_private(r_));
93+
simde_vmovl_s32(c));
94+
return simde_vqsubq_s64(a, simde_vqaddq_s64(r, r));
9995
#endif
10096
}
10197
#if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES)

‎simde/arm/neon/qrdmulh.h‎

Lines changed: 8 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -40,7 +40,10 @@ simde_vqrdmulhh_s16(int16_t a, int16_t b) {
4040
#if defined(SIMDE_ARM_NEON_A64V8_NATIVE)
4141
return vqrdmulhh_s16(a, b);
4242
#else
43-
return HEDLEY_STATIC_CAST(int16_t, (((1 << 15) + ((HEDLEY_STATIC_CAST(int32_t, (HEDLEY_STATIC_CAST(int32_t, a) * HEDLEY_STATIC_CAST(int32_t, b)))) << 1)) >> 16) & 0xffff);
43+
int32_t temp = HEDLEY_STATIC_CAST(int32_t, a) * HEDLEY_STATIC_CAST(int32_t, b);
44+
int32_t r = temp > 0 ? (temp > (INT32_MAX >> 1) ? INT32_MAX : (temp << 1)) : (temp < (INT32_MIN >> 1) ? INT32_MIN : (temp << 1));
45+
r = (r > (INT32_MAX - (1 << 15))) ? INT32_MAX : ((1 << 15) + r);
46+
return HEDLEY_STATIC_CAST(int16_t, ((r >> 16) & 0xffff));
4447
#endif
4548
}
4649
#if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES)
@@ -54,7 +57,10 @@ simde_vqrdmulhs_s32(int32_t a, int32_t b) {
5457
#if defined(SIMDE_ARM_NEON_A64V8_NATIVE)
5558
return vqrdmulhs_s32(a, b);
5659
#else
57-
return HEDLEY_STATIC_CAST(int32_t, (((HEDLEY_STATIC_CAST(int64_t, 1) << 31) + ((HEDLEY_STATIC_CAST(int64_t, (HEDLEY_STATIC_CAST(int64_t, a) * HEDLEY_STATIC_CAST(int64_t, b)))) << 1)) >> 32) & 0xffffffff);
60+
int64_t temp = HEDLEY_STATIC_CAST(int64_t, a) * HEDLEY_STATIC_CAST(int64_t, b);
61+
int64_t r = temp > 0 ? (temp > (INT64_MAX >> 1) ? INT64_MAX : (temp << 1)) : (temp < (INT64_MIN >> 1) ? INT64_MIN : (temp << 1));
62+
r = (r > (INT64_MAX - (HEDLEY_STATIC_CAST(int64_t, 1) << 31))) ? INT64_MAX : ((HEDLEY_STATIC_CAST(int64_t, 1) << 31) + r);
63+
return HEDLEY_STATIC_CAST(int32_t, ((r >> 32) & 0xffffffff));
5864
#endif
5965
}
6066
#if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES)

‎simde/arm/neon/qrshl.h‎

Lines changed: 16 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -44,7 +44,10 @@ simde_vqrshlb_s8(int8_t a, int8_t b) {
4444
if (b < -8) {
4545
r = 0;
4646
} else if (b < 0) {
47-
r = HEDLEY_STATIC_CAST(int8_t, ((a + (1 << (-b - 1))) >> -b));
47+
r = HEDLEY_STATIC_CAST(int8_t, a <= 0
48+
? ((a + (1 << (-b - 1))) >> -b)
49+
: HEDLEY_STATIC_CAST(int8_t, ((HEDLEY_STATIC_CAST(uint8_t,
50+
(a + (1 << (-b - 1)))) >> -b) & 0x7FUL)));
4851
} else if (b == 0) {
4952
r = a;
5053
} else if (b < 7) {
@@ -79,7 +82,10 @@ simde_vqrshlh_s16(int16_t a, int16_t b) {
7982
if (b8 <= -16) {
8083
r = 0;
8184
} else if (b8 < 0) {
82-
r = HEDLEY_STATIC_CAST(int16_t, ((a + (1 << (-b8 - 1))) >> -b8));
85+
r = HEDLEY_STATIC_CAST(int16_t, a <= 0
86+
? ((a + (1 << (-b8 - 1))) >> -b8)
87+
: HEDLEY_STATIC_CAST(int16_t, ((HEDLEY_STATIC_CAST(uint16_t,
88+
(a + (1 << (-b8 - 1)))) >> -b8) & 0x7FFFUL)));
8389
} else if (b8 == 0) {
8490
r = a;
8591
} else if (b8 < 15) {
@@ -114,7 +120,10 @@ simde_vqrshls_s32(int32_t a, int32_t b) {
114120
if (b8 <= -32) {
115121
r = 0;
116122
} else if (b8 < 0) {
117-
r = ((a + (1 << (-b8 - 1))) >> -b8);
123+
r = a <= 0
124+
? ((a + (1 << (-b8 - 1))) >> -b8)
125+
: HEDLEY_STATIC_CAST(int32_t, ((HEDLEY_STATIC_CAST(uint32_t,
126+
(a + (1 << (-b8 - 1)))) >> -b8) & 0x7FFFFFFFUL));
118127
} else if (b8 == 0) {
119128
r = a;
120129
} else if (b8 < 31) {
@@ -149,7 +158,10 @@ simde_vqrshld_s64(int64_t a, int64_t b) {
149158
if (b8 <= -64) {
150159
r = 0;
151160
} else if (b8 < 0) {
152-
r = ((a + (INT64_C(1) << (-b8 - 1))) >> -b8);
161+
r = a <= 0
162+
? ((a + (INT64_C(1) << (-b8 - 1))) >> -b8)
163+
: HEDLEY_STATIC_CAST(int64_t, ((HEDLEY_STATIC_CAST(uint64_t,
164+
(a + (INT64_C(1) << (-b8 - 1)))) >> -b8) & 0x7FFFFFFFFFFFFFFFUL));
153165
} else if (b8 == 0) {
154166
r = a;
155167
} else if (b8 < 63) {

‎simde/arm/neon/rshl.h‎

Lines changed: 22 additions & 8 deletions
Original file line numberDiff line numberDiff line change
@@ -84,7 +84,9 @@ simde_vrshld_s64(int64_t a, int64_t b) {
8484
? 0
8585
: (b >= 0)
8686
? (a << b)
87-
: ((a + (INT64_C(1) << (-b - 1))) >> -b);
87+
: (a <= 0
88+
? ((a + (INT64_C(1) << (-b - 1))) >> -b)
89+
: HEDLEY_STATIC_CAST(int64_t, (HEDLEY_STATIC_CAST(uint64_t, (a + (INT64_C(1) << (-b - 1)))) >> -b)));
8890
#endif
8991
}
9092
#if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES)
@@ -148,7 +150,9 @@ simde_vrshl_s8 (const simde_int8x8_t a, const simde_int8x8_t b) {
148150
r_.values[i] = HEDLEY_STATIC_CAST(int8_t,
149151
(simde_math_abs(b_.values[i]) >= 8) ? 0 :
150152
(b_.values[i] >= 0) ? (a_.values[i] << b_.values[i]) :
151-
((a_.values[i] + (1 << (-b_.values[i] - 1))) >> -b_.values[i]));
153+
((a_.values[i] <= 0) ? ((a_.values[i] + (1 << (-b_.values[i] - 1))) >> -b_.values[i]) :
154+
HEDLEY_STATIC_CAST(int8_t, ((HEDLEY_STATIC_CAST(uint8_t,
155+
(a_.values[i] + (1 << (-b_.values[i] - 1)))) >> -b_.values[i]) & (0x7FUL)))));
152156
}
153157
#endif
154158

@@ -189,7 +193,9 @@ simde_vrshl_s16 (const simde_int16x4_t a, const simde_int16x4_t b) {
189193
r_.values[i] = HEDLEY_STATIC_CAST(int16_t,
190194
(simde_math_abs(b_.values[i]) >= 16) ? 0 :
191195
(b_.values[i] >= 0) ? (a_.values[i] << b_.values[i]) :
192-
((a_.values[i] + (1 << (-b_.values[i] - 1))) >> -b_.values[i]));
196+
((a_.values[i] <= 0) ? ((a_.values[i] + (1 << (-b_.values[i] - 1))) >> -b_.values[i]) :
197+
HEDLEY_STATIC_CAST(int16_t, ((HEDLEY_STATIC_CAST(uint16_t,
198+
(a_.values[i] + (1 << (-b_.values[i] - 1)))) >> -b_.values[i]) & (0x7FFFUL)))));
193199
}
194200
#endif
195201

@@ -230,7 +236,9 @@ simde_vrshl_s32 (const simde_int32x2_t a, const simde_int32x2_t b) {
230236
r_.values[i] = HEDLEY_STATIC_CAST(int32_t,
231237
(simde_math_abs(b_.values[i]) >= 32) ? 0 :
232238
(b_.values[i] >= 0) ? (a_.values[i] << b_.values[i]) :
233-
((a_.values[i] + (1 << (-b_.values[i] - 1))) >> -b_.values[i]));
239+
((a_.values[i] <= 0) ? ((a_.values[i] + (1 << (-b_.values[i] - 1))) >> -b_.values[i]) :
240+
HEDLEY_STATIC_CAST(int32_t, ((HEDLEY_STATIC_CAST(uint32_t,
241+
(a_.values[i] + (1 << (-b_.values[i] - 1)))) >> -b_.values[i]) & (0x7FFFFFFFUL)))));
234242
}
235243
#endif
236244

@@ -513,7 +521,9 @@ simde_vrshlq_s8 (const simde_int8x16_t a, const simde_int8x16_t b) {
513521
r_.values[i] = HEDLEY_STATIC_CAST(int8_t,
514522
(simde_math_abs(b_.values[i]) >= 8) ? 0 :
515523
(b_.values[i] >= 0) ? (a_.values[i] << b_.values[i]) :
516-
((a_.values[i] + (1 << (-b_.values[i] - 1))) >> -b_.values[i]));
524+
((a_.values[i] <= 0) ? ((a_.values[i] + (1 << (-b_.values[i] - 1))) >> -b_.values[i]) :
525+
HEDLEY_STATIC_CAST(int8_t, ((HEDLEY_STATIC_CAST(uint8_t,
526+
(a_.values[i] + (1 << (-b_.values[i] - 1)))) >> -b_.values[i]) & (0x7FUL)))));
517527
}
518528
#endif
519529

@@ -580,7 +590,9 @@ simde_vrshlq_s16 (const simde_int16x8_t a, const simde_int16x8_t b) {
580590
r_.values[i] = HEDLEY_STATIC_CAST(int16_t,
581591
(simde_math_abs(b_.values[i]) >= 16) ? 0 :
582592
(b_.values[i] >= 0) ? (a_.values[i] << b_.values[i]) :
583-
((a_.values[i] + (1 << (-b_.values[i] - 1))) >> -b_.values[i]));
593+
((a_.values[i] <= 0) ? ((a_.values[i] + (1 << (-b_.values[i] - 1))) >> -b_.values[i]) :
594+
HEDLEY_STATIC_CAST(int16_t, ((HEDLEY_STATIC_CAST(uint16_t,
595+
(a_.values[i] + (1 << (-b_.values[i] - 1)))) >> -b_.values[i]) & (0x7FFFUL)))));
584596
}
585597
#endif
586598

@@ -634,8 +646,10 @@ simde_vrshlq_s32 (const simde_int32x4_t a, const simde_int32x4_t b) {
634646
b_.values[i] = HEDLEY_STATIC_CAST(int8_t, b_.values[i]);
635647
r_.values[i] = HEDLEY_STATIC_CAST(int32_t,
636648
(simde_math_abs(b_.values[i]) >= 32) ? 0 :
637-
(b_.values[i] >= 0) ? (a_.values[i] << b_.values[i]) :
638-
((a_.values[i] + (1 << (-b_.values[i] - 1))) >> -b_.values[i]));
649+
(b_.values[i] >= 0) ? (a_.values[i] << b_.values[i]) :
650+
((a_.values[i] <= 0) ? ((a_.values[i] + (1 << (-b_.values[i] - 1))) >> -b_.values[i]) :
651+
HEDLEY_STATIC_CAST(int32_t, ((HEDLEY_STATIC_CAST(uint32_t,
652+
(a_.values[i] + (1 << (-b_.values[i] - 1)))) >> -b_.values[i]) & (0X7FFFFFFFUL)))));
639653
}
640654
#endif
641655

‎test/arm/neon/qdmlal.c‎

Lines changed: 8 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -145,6 +145,10 @@ test_simde_vqdmlal_s16 (SIMDE_MUNIT_TEST_ARGS) {
145145
{ INT16_C( 8642), -INT16_C( 579), INT16_C( 2963), INT16_C( 9252) },
146146
{ -INT16_C( 7314), -INT16_C( 5230), INT16_C( 8688), INT16_C( 5749) },
147147
{ -INT32_C( 126337050), INT32_C( 6064180), INT32_C( 51565328), INT32_C( 106311312) } },
148+
{ { -INT32_C( 16), -INT32_C( 15), -INT32_C( 14), -INT32_C( 13) },
149+
{ INT16_MIN, INT16_MIN, INT16_MIN, INT16_MIN },
150+
{ INT16_MIN, INT16_MIN, INT16_MIN, INT16_MIN },
151+
{ INT32_C(2147483631), INT32_C(2147483632), INT32_C(2147483633), INT32_C(2147483634) } },
148152
};
149153

150154
for (size_t i = 0 ; i < (sizeof(test_vec) / sizeof(test_vec[0])) ; i++) {
@@ -199,6 +203,10 @@ test_simde_vqdmlal_s32 (SIMDE_MUNIT_TEST_ARGS) {
199203
{ -INT32_C( 8397045), INT32_C( 6142639) },
200204
{ -INT32_C( 6977990), -INT32_C( 5600341) },
201205
{ INT64_C(117189633707070), -INT64_C( 68801010159595) } },
206+
{ { -INT64_C( 16), -INT64_C( 15) },
207+
{ INT32_MIN, INT32_MIN },
208+
{ INT32_MIN, INT32_MIN },
209+
{INT64_C(9223372036854775791), INT64_C(9223372036854775792) } },
202210
};
203211

204212
for (size_t i = 0 ; i < (sizeof(test_vec) / sizeof(test_vec[0])) ; i++) {

‎test/arm/neon/qdmlsl.c‎

Lines changed: 8 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -145,6 +145,10 @@ test_simde_vqdmlsl_s16 (SIMDE_MUNIT_TEST_ARGS) {
145145
{ INT16_C( 8057), -INT16_C( 9339), INT16_C( 1806), INT16_C( 8600) },
146146
{ -INT16_C( 751), -INT16_C( 6991), INT16_C( 1494), -INT16_C( 6795)},
147147
{ INT32_C( 16070724), -INT32_C( 122085335), INT32_C( 18446020), INT32_C( 153174877) } },
148+
{ { -INT32_C( 16), -INT32_C( 15), -INT32_C( 14), -INT32_C( 13) },
149+
{ INT16_MIN, INT16_MIN, INT16_MIN, INT16_MIN },
150+
{ INT16_MIN, INT16_MIN, INT16_MIN, INT16_MIN },
151+
{ INT32_MIN, INT32_MIN, INT32_MIN, INT32_MIN } },
148152
};
149153

150154
for (size_t i = 0 ; i < (sizeof(test_vec) / sizeof(test_vec[0])) ; i++) {
@@ -199,6 +203,10 @@ test_simde_vqdmlsl_s32 (SIMDE_MUNIT_TEST_ARGS) {
199203
{ -INT32_C( 305245), -INT32_C( 548274) },
200204
{ -INT32_C( 805474), INT32_C( 431866)},
201205
{ -INT64_C( 353429066965), -INT64_C( 166180089563) } },
206+
{ { -INT64_C( 16), -INT64_C( 15) },
207+
{ INT32_MIN, INT32_MIN },
208+
{ INT32_MIN, INT32_MIN },
209+
{ INT64_MIN, INT64_MIN } },
202210
};
203211

204212
for (size_t i = 0 ; i < (sizeof(test_vec) / sizeof(test_vec[0])) ; i++) {

‎test/arm/neon/qrdmulh.c‎

Lines changed: 14 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -35,6 +35,9 @@ test_simde_vqrdmulh_s16 (SIMDE_MUNIT_TEST_ARGS) {
3535
{ { INT16_C( 31066), INT16_C( 19881), INT16_C( 14863), INT16_C( 16264) },
3636
{ INT16_C( 17499), INT16_C( 19391), -INT16_C( 23792), -INT16_C( 25706) },
3737
{ INT16_C( 16590), INT16_C( 11765), -INT16_C( 10792), -INT16_C( 12759) } },
38+
{ { INT16_MIN, INT16_MIN, INT16_MIN, INT16_MIN },
39+
{ INT16_MIN, INT16_MIN, INT16_MIN, INT16_MIN },
40+
{ INT16_MAX, INT16_MAX, INT16_MAX, INT16_MAX } },
3841

3942
};
4043

@@ -94,6 +97,9 @@ test_simde_vqrdmulh_s32 (SIMDE_MUNIT_TEST_ARGS) {
9497
{ { -INT32_C( 1216301242), INT32_C( 231209245) },
9598
{ INT32_C( 1833478310), -INT32_C( 429409792) },
9699
{ -INT32_C( 1038453516), -INT32_C( 46232489) } },
100+
{ { INT32_MIN, INT32_MIN },
101+
{ INT32_MIN, INT32_MIN },
102+
{ INT32_MAX, INT32_MAX } },
97103

98104
};
99105

@@ -153,6 +159,11 @@ test_simde_vqrdmulhq_s16 (SIMDE_MUNIT_TEST_ARGS) {
153159
{ { INT16_C( 28579), INT16_C( 26571), INT16_C( 23618), INT16_C( 3470), INT16_C( 10594), INT16_C( 31318), -INT16_C( 24794), INT16_C( 1860) },
154160
{ -INT16_C( 22526), -INT16_C( 12632), INT16_C( 21464), INT16_C( 8577), INT16_C( 28627), INT16_C( 27596), -INT16_C( 26895), -INT16_C( 27290) },
155161
{ -INT16_C( 19646), -INT16_C( 10243), INT16_C( 15470), INT16_C( 908), INT16_C( 9255), INT16_C( 26375), INT16_C( 20350), -INT16_C( 1549) } },
162+
#if !defined(SIMDE_X86_SSE_NATIVE) && !defined(SIMDE_X86_MMX_NATIVE)
163+
{ { INT16_MIN, INT16_MIN, INT16_MIN, INT16_MIN, INT16_MIN, INT16_MIN, INT16_MIN, INT16_MIN },
164+
{ INT16_MIN, INT16_MIN, INT16_MIN, INT16_MIN, INT16_MIN, INT16_MIN, INT16_MIN, INT16_MIN },
165+
{ INT16_MAX, INT16_MAX, INT16_MAX, INT16_MAX, INT16_MAX, INT16_MAX, INT16_MAX, INT16_MAX } },
166+
#endif
156167

157168
};
158169

@@ -212,6 +223,9 @@ test_simde_vqrdmulhq_s32 (SIMDE_MUNIT_TEST_ARGS) {
212223
{ { -INT32_C( 613662219), -INT32_C( 1259034176), INT32_C( 1695972338), -INT32_C( 22565202) },
213224
{ INT32_C( 1459986413), INT32_C( 865007473), -INT32_C( 921225670), -INT32_C( 335884554) },
214225
{ -INT32_C( 417203876), -INT32_C( 507139587), -INT32_C( 727536740), INT32_C( 3529388) } },
226+
{ { INT32_MIN, INT32_MIN, INT32_MIN, INT32_MIN },
227+
{ INT32_MIN, INT32_MIN, INT32_MIN, INT32_MIN },
228+
{ INT32_MAX, INT32_MAX, INT32_MAX, INT32_MAX } },
215229

216230
};
217231

‎test/arm/neon/qrdmulh_n.c‎

Lines changed: 12 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -35,6 +35,9 @@ test_simde_vqrdmulh_n_s16 (SIMDE_MUNIT_TEST_ARGS) {
3535
{ { -INT16_C( 14394), INT16_C( 28773), INT16_C( 30122), -INT16_C( 574) },
3636
-INT16_C( 10708),
3737
{ INT16_C( 4704), -INT16_C( 9403), -INT16_C( 9843), INT16_C( 188) } },
38+
{ { INT16_MIN, INT16_MIN, INT16_MIN, INT16_MIN },
39+
INT16_MIN,
40+
{ INT16_MAX, INT16_MAX, INT16_MAX, INT16_MAX } },
3841

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};
4043

@@ -94,6 +97,9 @@ test_simde_vqrdmulh_n_s32 (SIMDE_MUNIT_TEST_ARGS) {
9497
{ { -INT32_C( 1238271146), INT32_C( 1164109663) },
9598
INT32_C( 737217376),
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{ -INT32_C( 425090550), INT32_C( 399631388) } },
100+
{ { INT32_MIN, INT32_MIN },
101+
INT32_MIN,
102+
{ INT32_MAX, INT32_MAX } },
97103

98104
};
99105

@@ -153,6 +159,9 @@ test_simde_vqrdmulhq_n_s16 (SIMDE_MUNIT_TEST_ARGS) {
153159
{ { INT16_C( 15761), INT16_C( 23849), INT16_C( 9736), INT16_C( 26802), INT16_C( 27881), -INT16_C( 7053), -INT16_C( 14710), -INT16_C( 23581) },
154160
INT16_C( 25688),
155161
{ INT16_C( 12356), INT16_C( 18696), INT16_C( 7632), INT16_C( 21011), INT16_C( 21857), -INT16_C( 5529), -INT16_C( 11532), -INT16_C( 18486) } },
162+
{ { INT16_MIN, INT16_MIN, INT16_MIN, INT16_MIN, INT16_MIN, INT16_MIN, INT16_MIN, INT16_MIN },
163+
INT16_MIN,
164+
{ INT16_MAX, INT16_MAX, INT16_MAX, INT16_MAX, INT16_MAX, INT16_MAX, INT16_MAX, INT16_MAX } },
156165

157166
};
158167

@@ -212,6 +221,9 @@ test_simde_vqrdmulhq_n_s32 (SIMDE_MUNIT_TEST_ARGS) {
212221
{ { -INT32_C( 219487289), INT32_C( 1420994589), INT32_C( 889110344), -INT32_C( 2103115347) },
213222
INT32_C( 1735639961),
214223
{ -INT32_C( 177394091), INT32_C( 1148476728), INT32_C( 718597063), -INT32_C( 1699780598) } },
224+
{ { INT32_MIN, INT32_MIN, INT32_MIN, INT32_MIN },
225+
INT32_MIN,
226+
{ INT32_MAX, INT32_MAX, INT32_MAX, INT32_MAX } },
215227

216228
};
217229

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