Commit 72cbb07
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refcount_insertion: fix model reg mismatch in env bit assignment
Env initialization used hir_chase_assign (only follows Assign instrs)
to compute model registers for support bit assignment. But the pass
processing uses phx_rc_model_reg (follows ALL passthroughs except
GuardIs). When a phi input goes through a non-Assign passthrough
(CheckField, CheckVar, etc.), the two functions return different model
registers. The env assigns a bit for the chase_assign model, but the
pass looks up using the modelReg model — returning -1 (not found).
This -1 was then cast to size_t (becoming SIZE_MAX) and passed to
phx_bv_set_bit, causing out-of-bounds memory access → SIGSEGV.
Fix: use phx_rc_model_reg in env initialization, matching the pass.
Bug python#17: triggered by nbody's phi inputs through non-Assign passthrough
instructions (list subscript operations producing CheckVar intermediaries).1 parent ea68ae2 commit 72cbb07
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