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| 1 | +//! Stable "polyfills" for unstable `core::arch::aarch64` intrinsics which use |
| 2 | +//! `asm!` internally to allow use on stable Rust. |
| 3 | +// TODO(tarcieri): remove when these intrinsics have been stabilized |
| 4 | + |
| 5 | +use core::arch::{aarch64::uint8x16_t, asm}; |
| 6 | + |
| 7 | +/// AES single round encryption. |
| 8 | +#[inline(always)] |
| 9 | +pub(super) unsafe fn vaeseq_u8(mut data: uint8x16_t, key: uint8x16_t) -> uint8x16_t { |
| 10 | + asm!( |
| 11 | + "AESE {:v}.16B, {:v}.16B", |
| 12 | + inout(vreg) data, in(vreg) key, |
| 13 | + options(pure, nomem, nostack, preserves_flags) |
| 14 | + ); |
| 15 | + data |
| 16 | +} |
| 17 | + |
| 18 | +/// AES single round decryption. |
| 19 | +#[inline(always)] |
| 20 | +pub(super) unsafe fn vaesdq_u8(mut data: uint8x16_t, key: uint8x16_t) -> uint8x16_t { |
| 21 | + asm!( |
| 22 | + "AESD {:v}.16B, {:v}.16B", |
| 23 | + inout(vreg) data, in(vreg) key, |
| 24 | + options(pure, nomem, nostack, preserves_flags) |
| 25 | + ); |
| 26 | + data |
| 27 | +} |
| 28 | + |
| 29 | +/// AES mix columns. |
| 30 | +#[cfg(feature = "hazmat")] |
| 31 | +#[inline(always)] |
| 32 | +pub(super) unsafe fn vaesmcq_u8(mut data: uint8x16_t) -> uint8x16_t { |
| 33 | + asm!( |
| 34 | + "AESMC {:v}.16B, {:v}.16B", |
| 35 | + out(vreg) data, in(vreg) data, |
| 36 | + options(pure, nomem, nostack, preserves_flags) |
| 37 | + ); |
| 38 | + data |
| 39 | +} |
| 40 | + |
| 41 | +/// AES inverse mix columns. |
| 42 | +#[inline(always)] |
| 43 | +pub(super) unsafe fn vaesimcq_u8(mut data: uint8x16_t) -> uint8x16_t { |
| 44 | + asm!( |
| 45 | + "AESIMC {:v}.16B, {:v}.16B", |
| 46 | + out(vreg) data, in(vreg) data, |
| 47 | + options(pure, nomem, nostack, preserves_flags) |
| 48 | + ); |
| 49 | + data |
| 50 | +} |
| 51 | + |
| 52 | +/// AES single round encryption combined with mix columns. |
| 53 | +/// |
| 54 | +/// These two instructions are combined into a single assembly block to ensure |
| 55 | +/// that instructions fuse properly. |
| 56 | +#[inline(always)] |
| 57 | +pub(super) unsafe fn vaeseq_u8_and_vaesmcq_u8(mut data: uint8x16_t, key: uint8x16_t) -> uint8x16_t { |
| 58 | + asm!( |
| 59 | + "AESE {d:v}.16B, {k:v}.16B", |
| 60 | + "AESMC {d:v}.16B, {d:v}.16B", |
| 61 | + d = inout(vreg) data, |
| 62 | + k = in(vreg) key, |
| 63 | + options(pure, nomem, nostack, preserves_flags) |
| 64 | + ); |
| 65 | + data |
| 66 | +} |
| 67 | + |
| 68 | +/// AES single round decryption combined with mix columns. |
| 69 | +/// |
| 70 | +/// These two instructions are combined into a single assembly block to ensure |
| 71 | +/// that instructions fuse properly. |
| 72 | +#[inline(always)] |
| 73 | +pub(super) unsafe fn vaesdq_u8_and_vaesimcq_u8( |
| 74 | + mut data: uint8x16_t, |
| 75 | + key: uint8x16_t, |
| 76 | +) -> uint8x16_t { |
| 77 | + asm!( |
| 78 | + "AESD {d:v}.16B, {k:v}.16B", |
| 79 | + "AESIMC {d:v}.16B, {d:v}.16B", |
| 80 | + d = inout(vreg) data, |
| 81 | + k = in(vreg) key, |
| 82 | + options(pure, nomem, nostack, preserves_flags) |
| 83 | + ); |
| 84 | + data |
| 85 | +} |
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