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1 parent 63dc9a9 commit a1dde24Copy full SHA for a1dde24
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ChangeLog
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Change Log
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+CLRadeonExtender 0.1.4r1:
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+* fixed code operation in SMRD and SMEM instructions
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+* fixed parsing symbol register ranges begins from 'exec', 'vcc', 'tma', ...
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+* checking end of line at parsing symbol and regvar register ranges
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CLRadeonExtender 0.1.4:
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* add AMD RX VEGA support (GCN 1.4/VEGA)
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