Fixes for STM32 HMAC support (testing with TLS v1.3 ojn STM32H753ZI)

Author: dgarske

wolfcrypt/src/port/st/stm32.c

@@ -183,32 +183,31 @@ static void wc_Stm32_Hash_RestoreContext(STM32_HASH_Context* ctx, word32 algo,
         #endif
         );
 
-        /* configure algorithm, mode and data type
-         * mode is HASH_ALGOMODE_HASH or HASH_ALGOMODE_HMAC */
-        HASH->CR |= (algo | mode | HASH_DATATYPE_8B);
-
-        /* reset HASH processor */
-        HASH->CR |= HASH_CR_INIT;
+        /* configure algorithm, mode, data type and reset HASH processor.
+         * INIT must be written in the same register write as the algorithm
+         * selection — on some STM32 variants (e.g. H753) a separate INIT
+         * write resets the ALGO bits back to MD5 (0). */
+        HASH->CR = (algo | mode | HASH_DATATYPE_8B | HASH_CR_INIT);
 
         /* by default mark all bits valid */
         wc_Stm32_Hash_NumValidBits(0);
 
 #ifdef DEBUG_STM32_HASH
-        printf("STM Init algo %x, mode %x\n", (unsigned int)algo,
-            (unsigned int)mode);
+        printf("STM Init algo %x, mode %x, CR %lx, SR %lx\n",
+            (unsigned int)algo, (unsigned int)mode,
+            HASH->CR, HASH->SR);
 #endif
     }
     else {
         /* restore context registers */
         HASH->IMR = ctx->HASH_IMR;
         HASH->STR = ctx->HASH_STR;
-        HASH->CR = ctx->HASH_CR;
 #ifdef STM32_HASH_SHA3
         HASH->SHA3CFGR = ctx->SHA3CFGR;
 #endif
 
-        /* Initialize the hash processor */
-        HASH->CR |= HASH_CR_INIT;
+        /* Restore CR and initialize in a single write (see init path comment) */
+        HASH->CR = ctx->HASH_CR | HASH_CR_INIT;
 
         /* continue restoring context registers */
         for (i=0; i<HASH_CR_SIZE; i++) {