Skip to content

Commit 92a8a7e

Browse files
dgarskedgarske
committed
Support for NXP S32K14XX
1 parent e02d38b commit 92a8a7e

12 files changed

Lines changed: 1692 additions & 0 deletions

File tree

‎.github/workflows/test-configs.yml‎

Lines changed: 24 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -216,6 +216,30 @@ jobs:
216216
arch: arm
217217
config-file: ./config/examples/mcxw-tz.config
218218

219+
nxp_s32k142_test:
220+
uses: ./.github/workflows/test-build.yml
221+
with:
222+
arch: arm
223+
config-file: ./config/examples/nxp-s32k142.config
224+
225+
nxp_s32k144_test:
226+
uses: ./.github/workflows/test-build.yml
227+
with:
228+
arch: arm
229+
config-file: ./config/examples/nxp-s32k144.config
230+
231+
nxp_s32k146_test:
232+
uses: ./.github/workflows/test-build.yml
233+
with:
234+
arch: arm
235+
config-file: ./config/examples/nxp-s32k146.config
236+
237+
nxp_s32k148_test:
238+
uses: ./.github/workflows/test-build.yml
239+
with:
240+
arch: arm
241+
config-file: ./config/examples/nxp-s32k148.config
242+
219243
microchip_mpfs250_test:
220244
uses: ./.github/workflows/test-build-riscv.yml
221245
with:

‎config/examples/nxp-s32k142.config‎

Lines changed: 52 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,52 @@
1+
# wolfBoot configuration for NXP S32K142
2+
#
3+
# S32K142: Cortex-M4F, 256KB Flash, 32KB SRAM
4+
# Flash sector size: 2KB
5+
# Default: RUN mode at 48 MHz (FIRC - internal RC oscillator)
6+
#
7+
# Build: cp config/examples/nxp-s32k142.config .config && make
8+
9+
ARCH?=ARM
10+
CORTEX_M4?=1
11+
TARGET?=s32k1xx
12+
SIGN?=ECC256
13+
HASH?=SHA256
14+
DEBUG?=0
15+
VTOR?=1
16+
NO_ASM?=0
17+
EXT_FLASH?=0
18+
SPI_FLASH?=0
19+
ALLOW_DOWNGRADE?=0
20+
NVM_FLASH_WRITEONCE?=0
21+
WOLFBOOT_VERSION?=0
22+
V?=0
23+
SPMATH?=1
24+
RAM_CODE?=0
25+
DUALBANK_SWAP?=0
26+
27+
# Disable MPU (S32K1xx MPU configuration needs customization)
28+
WOLFBOOT_NO_MPU?=1
29+
30+
# Enable hardfault debugging
31+
DEBUG_HARDFAULT?=1
32+
33+
# Debug UART on LPUART1 (PTC6=RX, PTC7=TX)
34+
DEBUG_UART?=1
35+
36+
# 2KB sectors (S32K142 only - larger variants use 4KB sectors)
37+
WOLFBOOT_SECTOR_SIZE?=0x800
38+
39+
# Memory layout for S32K142 (256KB Flash):
40+
# Bootloader: 0x00000000 - 0x0000BFFF (48 KB)
41+
# Boot Partition: 0x0000C000 - 0x00024FFF (100 KB)
42+
# Update Partition: 0x00025000 - 0x0003DFFF (100 KB)
43+
# Swap Sector: 0x0003E000 - 0x0003E7FF (2 KB)
44+
WOLFBOOT_PARTITION_SIZE?=0x19000
45+
WOLFBOOT_PARTITION_BOOT_ADDRESS?=0xC000
46+
WOLFBOOT_PARTITION_UPDATE_ADDRESS?=0x25000
47+
WOLFBOOT_PARTITION_SWAP_ADDRESS?=0x3E000
48+
49+
# Clock mode: Default is RUN mode with FIRC (48 MHz internal RC)
50+
# To enable HSRUN mode (112 MHz), uncomment below (requires SOSC + SPLL, not fully implemented):
51+
#CFLAGS_EXTRA+=-DS32K1XX_CLOCK_HSRUN
52+

‎config/examples/nxp-s32k144.config‎

Lines changed: 57 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,57 @@
1+
# wolfBoot configuration for NXP S32K144
2+
#
3+
# S32K144: Cortex-M4F, 512KB Flash, 64KB SRAM
4+
# Flash sector size: 4KB (larger flash variants use 4KB sectors)
5+
# Default: RUN mode at 48 MHz (FIRC - internal RC oscillator)
6+
#
7+
# Build: cp config/examples/nxp-s32k144.config .config && make
8+
9+
ARCH?=ARM
10+
CORTEX_M4?=1
11+
TARGET?=s32k1xx
12+
SIGN?=ECC256
13+
HASH?=SHA256
14+
DEBUG?=0
15+
VTOR?=1
16+
NO_ASM?=0
17+
EXT_FLASH?=0
18+
SPI_FLASH?=0
19+
ALLOW_DOWNGRADE?=0
20+
NVM_FLASH_WRITEONCE?=0
21+
WOLFBOOT_VERSION?=0
22+
V?=0
23+
SPMATH?=1
24+
RAM_CODE?=0
25+
DUALBANK_SWAP?=0
26+
27+
# Select S32K144 variant for correct flash size and sector size
28+
CFLAGS_EXTRA+=-DS32K144
29+
30+
# Disable MPU (S32K1xx MPU configuration needs customization)
31+
WOLFBOOT_NO_MPU?=1
32+
33+
# Enable hardfault debugging
34+
DEBUG_HARDFAULT?=1
35+
36+
# Debug UART on LPUART1 (PTC6=RX, PTC7=TX)
37+
DEBUG_UART?=1
38+
39+
# 4KB sectors (S32K144/146/148 with 512KB+ flash)
40+
WOLFBOOT_SECTOR_SIZE?=0x1000
41+
42+
# Memory layout for S32K144 (512KB Flash):
43+
# Bootloader: 0x00000000 - 0x0000BFFF (48 KB)
44+
# Boot Partition: 0x0000C000 - 0x00043FFF (224 KB)
45+
# Update Partition: 0x00044000 - 0x0007BFFF (224 KB)
46+
# Swap Sector: 0x0007C000 - 0x0007CFFF (4 KB)
47+
WOLFBOOT_PARTITION_SIZE?=0x38000
48+
WOLFBOOT_PARTITION_BOOT_ADDRESS?=0xC000
49+
WOLFBOOT_PARTITION_UPDATE_ADDRESS?=0x44000
50+
WOLFBOOT_PARTITION_SWAP_ADDRESS?=0x7C000
51+
52+
# Clock mode: Default is RUN mode with FIRC (48 MHz internal RC)
53+
# To enable HSRUN mode (112 MHz), uncomment below (requires SOSC + SPLL, not fully implemented):
54+
#CFLAGS_EXTRA+=-DS32K1XX_CLOCK_HSRUN
55+
56+
57+

‎config/examples/nxp-s32k146.config‎

Lines changed: 57 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,57 @@
1+
# wolfBoot configuration for NXP S32K146
2+
#
3+
# S32K146: Cortex-M4F, 1MB Flash, 128KB SRAM
4+
# Flash sector size: 4KB (larger flash variants use 4KB sectors)
5+
# Default: RUN mode at 48 MHz (FIRC - internal RC oscillator)
6+
#
7+
# Build: cp config/examples/nxp-s32k146.config .config && make
8+
9+
ARCH?=ARM
10+
CORTEX_M4?=1
11+
TARGET?=s32k1xx
12+
SIGN?=ECC256
13+
HASH?=SHA256
14+
DEBUG?=0
15+
VTOR?=1
16+
NO_ASM?=0
17+
EXT_FLASH?=0
18+
SPI_FLASH?=0
19+
ALLOW_DOWNGRADE?=0
20+
NVM_FLASH_WRITEONCE?=0
21+
WOLFBOOT_VERSION?=0
22+
V?=0
23+
SPMATH?=1
24+
RAM_CODE?=0
25+
DUALBANK_SWAP?=0
26+
27+
# Select S32K146 variant for correct flash size and sector size
28+
CFLAGS_EXTRA+=-DS32K146
29+
30+
# Disable MPU (S32K1xx MPU configuration needs customization)
31+
WOLFBOOT_NO_MPU?=1
32+
33+
# Enable hardfault debugging
34+
DEBUG_HARDFAULT?=1
35+
36+
# Debug UART on LPUART1 (PTC6=RX, PTC7=TX)
37+
DEBUG_UART?=1
38+
39+
# 4KB sectors (S32K144/146/148 with 512KB+ flash)
40+
WOLFBOOT_SECTOR_SIZE?=0x1000
41+
42+
# Memory layout for S32K146 (1MB Flash):
43+
# Bootloader: 0x00000000 - 0x0000BFFF (48 KB)
44+
# Boot Partition: 0x0000C000 - 0x0007FFFF (464 KB)
45+
# Update Partition: 0x00080000 - 0x000F3FFF (464 KB)
46+
# Swap Sector: 0x000F4000 - 0x000F4FFF (4 KB)
47+
WOLFBOOT_PARTITION_SIZE?=0x74000
48+
WOLFBOOT_PARTITION_BOOT_ADDRESS?=0xC000
49+
WOLFBOOT_PARTITION_UPDATE_ADDRESS?=0x80000
50+
WOLFBOOT_PARTITION_SWAP_ADDRESS?=0xF4000
51+
52+
# Clock mode: Default is RUN mode with FIRC (48 MHz internal RC)
53+
# To enable HSRUN mode (112 MHz), uncomment below (requires SOSC + SPLL, not fully implemented):
54+
#CFLAGS_EXTRA+=-DS32K1XX_CLOCK_HSRUN
55+
56+
57+

‎config/examples/nxp-s32k148.config‎

Lines changed: 57 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,57 @@
1+
# wolfBoot configuration for NXP S32K148
2+
#
3+
# S32K148: Cortex-M4F, 2MB Flash, 256KB SRAM
4+
# Flash sector size: 4KB (larger flash variants use 4KB sectors)
5+
# Default: RUN mode at 48 MHz (FIRC - internal RC oscillator)
6+
#
7+
# Build: cp config/examples/nxp-s32k148.config .config && make
8+
9+
ARCH?=ARM
10+
CORTEX_M4?=1
11+
TARGET?=s32k1xx
12+
SIGN?=ECC256
13+
HASH?=SHA256
14+
DEBUG?=0
15+
VTOR?=1
16+
NO_ASM?=0
17+
EXT_FLASH?=0
18+
SPI_FLASH?=0
19+
ALLOW_DOWNGRADE?=0
20+
NVM_FLASH_WRITEONCE?=0
21+
WOLFBOOT_VERSION?=0
22+
V?=0
23+
SPMATH?=1
24+
RAM_CODE?=0
25+
DUALBANK_SWAP?=0
26+
27+
# Select S32K148 variant for correct flash size and sector size
28+
CFLAGS_EXTRA+=-DS32K148
29+
30+
# Disable MPU (S32K1xx MPU configuration needs customization)
31+
WOLFBOOT_NO_MPU?=1
32+
33+
# Enable hardfault debugging
34+
DEBUG_HARDFAULT?=1
35+
36+
# Debug UART on LPUART1 (PTC6=RX, PTC7=TX)
37+
DEBUG_UART?=1
38+
39+
# 4KB sectors (S32K144/146/148 with 512KB+ flash)
40+
WOLFBOOT_SECTOR_SIZE?=0x1000
41+
42+
# Memory layout for S32K148 (2MB Flash):
43+
# Bootloader: 0x00000000 - 0x0000BFFF (48 KB)
44+
# Boot Partition: 0x0000C000 - 0x000FBFFF (960 KB)
45+
# Update Partition: 0x000FC000 - 0x001EBFFF (960 KB)
46+
# Swap Sector: 0x001EC000 - 0x001ECFFF (4 KB)
47+
WOLFBOOT_PARTITION_SIZE?=0xF0000
48+
WOLFBOOT_PARTITION_BOOT_ADDRESS?=0xC000
49+
WOLFBOOT_PARTITION_UPDATE_ADDRESS?=0xFC000
50+
WOLFBOOT_PARTITION_SWAP_ADDRESS?=0x1EC000
51+
52+
# Clock mode: Default is RUN mode with FIRC (48 MHz internal RC)
53+
# To enable HSRUN mode (112 MHz), uncomment below (requires SOSC + SPLL, not fully implemented):
54+
#CFLAGS_EXTRA+=-DS32K1XX_CLOCK_HSRUN
55+
56+
57+

0 commit comments

Comments
 (0)