zynq7000.config

ARCH?=ARM
TARGET?=zynq7000
SIGN?=ECC256
HASH?=SHA256

# Cortex-A9 (Zynq-7000) - selected automatically via TARGET=zynq7000 in arch.mk
DEBUG?=0
DEBUG_UART?=1
V?=0
SPMATH?=1

# wolfBoot itself is loaded by Xilinx FSBL to DDR at 0x04000000 (hal/zynq7000.ld).
# WOLFBOOT_LOAD_ADDRESS is the *app* staging address: where wolfBoot copies
# the verified signed image before do_boot. Must NOT overlap wolfBoot itself
# AND src/update_ram.c expects dst > wolfBoot's _end - so place it above the
# wolfBoot region (0x04000000-0x040FFFFF) at 16 MB.
WOLFBOOT_LOAD_ADDRESS=0x10000000

# QSPI flash (16 MB N25Q128A on ZC702) via XQspiPs (hal/zynq7000.c).
# Override EXT_FLASH=0 on the make command line for JTAG-only dev builds.
EXT_FLASH?=1
NO_XIP=1

# QSPI partition layout (16 MB total):
#   0x000000 - 0x0FFFFF  BOOT.BIN (FSBL + wolfboot)
#   0x100000 - 0x6FFFFF  BOOT_A   (~6 MB primary)
#   0x700000 - 0xCFFFFF  UPDATE_B (~6 MB update)
#   0xD00000 - 0xD0FFFF  SWAP scratch (64 KB sector)
WOLFBOOT_PARTITION_BOOT_ADDRESS=0x00100000
WOLFBOOT_PARTITION_UPDATE_ADDRESS=0x00700000
WOLFBOOT_PARTITION_SWAP_ADDRESS=0x00D00000
WOLFBOOT_PARTITION_SIZE=0x00600000
WOLFBOOT_SECTOR_SIZE=0x10000

# DTS placeholders (used in Milestone 5 for Linux payload)
WOLFBOOT_LOAD_DTS_ADDRESS=0x00100000
WOLFBOOT_DTS_BOOT_ADDRESS=0x00080000
WOLFBOOT_DTS_UPDATE_ADDRESS=0x00680000

IMAGE_HEADER_SIZE=1024

CROSS_COMPILE=arm-none-eabi-