-
Notifications
You must be signed in to change notification settings - Fork 12
Expand file tree
/
Copy pathcvbasic_nes_prologue.asm
More file actions
1681 lines (1563 loc) · 21 KB
/
cvbasic_nes_prologue.asm
File metadata and controls
1681 lines (1563 loc) · 21 KB
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167
168
169
170
171
172
173
174
175
176
177
178
179
180
181
182
183
184
185
186
187
188
189
190
191
192
193
194
195
196
197
198
199
200
201
202
203
204
205
206
207
208
209
210
211
212
213
214
215
216
217
218
219
220
221
222
223
224
225
226
227
228
229
230
231
232
233
234
235
236
237
238
239
240
241
242
243
244
245
246
247
248
249
250
251
252
253
254
255
256
257
258
259
260
261
262
263
264
265
266
267
268
269
270
271
272
273
274
275
276
277
278
279
280
281
282
283
284
285
286
287
288
289
290
291
292
293
294
295
296
297
298
299
300
301
302
303
304
305
306
307
308
309
310
311
312
313
314
315
316
317
318
319
320
321
322
323
324
325
326
327
328
329
330
331
332
333
334
335
336
337
338
339
340
341
342
343
344
345
346
347
348
349
350
351
352
353
354
355
356
357
358
359
360
361
362
363
364
365
366
367
368
369
370
371
372
373
374
375
376
377
378
379
380
381
382
383
384
385
386
387
388
389
390
391
392
393
394
395
396
397
398
399
400
401
402
403
404
405
406
407
408
409
410
411
412
413
414
415
416
417
418
419
420
421
422
423
424
425
426
427
428
429
430
431
432
433
434
435
436
437
438
439
440
441
442
443
444
445
446
447
448
449
450
451
452
453
454
455
456
457
458
459
460
461
462
463
464
465
466
467
468
469
470
471
472
473
474
475
476
477
478
479
480
481
482
483
484
485
486
487
488
489
490
491
492
493
494
495
496
497
498
499
500
501
502
503
504
505
506
507
508
509
510
511
512
513
514
515
516
517
518
519
520
521
522
523
524
525
526
527
528
529
530
531
532
533
534
535
536
537
538
539
540
541
542
543
544
545
546
547
548
549
550
551
552
553
554
555
556
557
558
559
560
561
562
563
564
565
566
567
568
569
570
571
572
573
574
575
576
577
578
579
580
581
582
583
584
585
586
587
588
589
590
591
592
593
594
595
596
597
598
599
600
601
602
603
604
605
606
607
608
609
610
611
612
613
614
615
616
617
618
619
620
621
622
623
624
625
626
627
628
629
630
631
632
633
634
635
636
637
638
639
640
641
642
643
644
645
646
647
648
649
650
651
652
653
654
655
656
657
658
659
660
661
662
663
664
665
666
667
668
669
670
671
672
673
674
675
676
677
678
679
680
681
682
683
684
685
686
687
688
689
690
691
692
693
694
695
696
697
698
699
700
701
702
703
704
705
706
707
708
709
710
711
712
713
714
715
716
717
718
719
720
721
722
723
724
725
726
727
728
729
730
731
732
733
734
735
736
737
738
739
740
741
742
743
744
745
746
747
748
749
750
751
752
753
754
755
756
757
758
759
760
761
762
763
764
765
766
767
768
769
770
771
772
773
774
775
776
777
778
779
780
781
782
783
784
785
786
787
788
789
790
791
792
793
794
795
796
797
798
799
800
801
802
803
804
805
806
807
808
809
810
811
812
813
814
815
816
817
818
819
820
821
822
823
824
825
826
827
828
829
830
831
832
833
834
835
836
837
838
839
840
841
842
843
844
845
846
847
848
849
850
851
852
853
854
855
856
857
858
859
860
861
862
863
864
865
866
867
868
869
870
871
872
873
874
875
876
877
878
879
880
881
882
883
884
885
886
887
888
889
890
891
892
893
894
895
896
897
898
899
900
901
902
903
904
905
906
907
908
909
910
911
912
913
914
915
916
917
918
919
920
921
922
923
924
925
926
927
928
929
930
931
932
933
934
935
936
937
938
939
940
941
942
943
944
945
946
947
948
949
950
951
952
953
954
955
956
957
958
959
960
961
962
963
964
965
966
967
968
969
970
971
972
973
974
975
976
977
978
979
980
981
982
983
984
985
986
987
988
989
990
991
992
993
994
995
996
997
998
999
1000
;
; CVBasic prologue (BASIC compiler, 6502 target)
;
; by Oscar Toledo G.
; https://nanochess.org/
;
; Creation date: May/13/2025.
; Revision date: Jul/20/2025. Added code to load sprites and read controllers.
; Revision date: Aug/23/2025. Support for writing VRAM and PRINT.
; Revision date: Aug/24/2025. Support for scrolling, SCREEN, and DISABLE/ENABLE.
; Added music player.
; Revision date: Aug/25/2025. Added support for 256K and 512K ROM.
; Revision date: Aug/26/2025. Added support for CHRRAM selection.
; Revision date: Feb/16/2026. Relocated PPUBUF.
; Revision date: Mar/25/2026. Faster _mul16 (using Y in loop) and _div16
; (avoids update using registers)
; Revision date: Mar/29/2026. Avoids unwinding stack for _mul16, _div16, _div16s,
; _mod16, and _mod16s.
;
CPU 6502
;
; Platforms supported:
; o NES/Famicom
;
;
; CVBasic variables in zero page.
;
ppu_source: equ $00 ; Used in NMI for source address for PPU copy
; This is a block of 8 bytes that should stay together.
temp: equ $02
temp2: equ $04
result: equ $06
pointer: equ $08
read_pointer: equ $0a
cursor: equ $0c
mode: equ $0e
ntsc: equ $0f
vdp_status: equ $10
flicker: equ $11
frame: equ $12
ppu_pointer: equ $14
ppu_temp: equ $15 ; Used in NMI to save X
ppu_ctrl: equ $16
ppu_mask: equ $17
scroll_x: equ $18
scroll_y: equ $1a
CHRRAM_BANK: equ $1c
cont_bits: equ $1d
lfsr: equ $1e
joy1_data: equ $20
joy2_data: equ $21
key1_data: equ $22
key2_data: equ $23
sprite_data: equ $24
IF CVBASIC_MUSIC_PLAYER
music_playing: EQU $4f
music_bank: EQU $30
music_timing: EQU $31
music_start: EQU $32
music_pointer: EQU $34
music_note_counter: EQU $36
music_instrument_1: EQU $37
music_note_1: EQU $38
music_counter_1: EQU $39
music_instrument_2: EQU $3a
music_note_2: EQU $3b
music_counter_2: EQU $3c
music_instrument_3: EQU $3d
music_note_3: EQU $3e
music_counter_3: EQU $3f
music_drum: EQU $40
music_counter_4: EQU $41
audio_freq1: EQU $42
audio_freq2: EQU $44
audio_freq3: EQU $46
audio_vol1: EQU $48
audio_vol2: EQU $49
audio_vol3: EQU $4a
audio_vol4hw: EQU $4b
audio_noise: EQU $4c
music_tick: EQU $4d
music_mode: EQU $4e
ENDIF
SPRITE_PAGE: EQU $02
PPUBUF: EQU $0140
PPUSIZE: EQU $40
BANKSEL: EQU $C000
FORG $0000
; The ORG address doesn't matter here
; iNES cartridge header
DB "NES",$1A
DB NES_PRG_BANKS
if CVBASIC_BANK_SWITCHING
DB 0 ; It has CHRRAM
DB $e2|NES_NAMETABLE ; Cartridge type LSB
DB $10 ; Cartridge type MSB
DB $00 ; Number of 8K RAM pages.
else
DB NES_CHR_BANKS
DB $00|NES_NAMETABLE ; Cartridge type LSB
DB $00 ; Cartridge type MSB
DB $00 ; Number of 8K RAM pages.
endif
DB $00,$00,$00,$00,$00,$00,$00 ; Reserved
if CVBASIC_BANK_SWITCHING
if CVBASIC_BANK_ROM_SIZE-512
FORG $3c010
ORG $c000
else
FORG $7c010
ORG $c000
endif
else
FORG $0010
ORG $8000
endif
PPUCTRL: EQU $2000
PPUMASK: EQU $2001
PPUSTATUS: EQU $2002
OAMADDR: EQU $2003
OAMDATA: EQU $2004
PPUSCROLL: EQU $2005
PPUADDR: EQU $2006
PPUDATA: EQU $2007
SPRRAM: EQU $4014
CONT1: EQU $4016
CONT2: EQU $4017
;
; NES architecture prevents direct access to VRAM except
; during the VBLANK.
;
WRTVRM:
PHA
TXA
LDX ppu_pointer
STA PPUBUF+2,X
PLA
STA PPUBUF,X
TYA
ORA #$40
STA PPUBUF+1,X
INX
INX
INX
STX ppu_pointer
CPX #PPUSIZE
BCS .1
RTS
.1:
JMP wait
LDIRVM4:
JSR LDIRVM2
JSR LDIRVM2
JSR LDIRVM2
JSR LDIRVM2
RTS
LDIRVM2:
JSR LDIRVM
LDA pointer
CLC
ADC temp2
STA pointer
BCC .1
INC pointer+1
.1:
RTS
LDIRVM:
LDX ppu_pointer
LDA pointer
STA PPUBUF,X
LDA pointer+1
STA PPUBUF+1,X
LDA #0
SEC
SBC temp2
STA PPUBUF+2,X
LDA temp
SEC
SBC PPUBUF+2,X
STA PPUBUF+3,X
LDA temp+1
SBC #0
STA PPUBUF+4,X
TXA
CLC
ADC #5
STA ppu_pointer
CMP #PPUSIZE
BCS .1
RTS
.1:
JMP wait
ENASCR:
LDA ppu_mask
ORA #$18
STA ppu_mask
RTS
DISSCR:
LDA ppu_mask
AND #$E7
STA ppu_mask
RTS
CPYBLK:
.1:
LDA temp2
PHA
LDA temp2+1
PHA
TXA
PHA
TYA
PHA
LDA temp
PHA
LDA temp+1
PHA
LDA #0
STA temp2+1
JSR LDIRVM
PLA
STA temp+1
PLA
STA temp
PLA
STA temp2+1
PLA
STA temp2
LDA temp
CLC
ADC temp2
STA temp
LDA temp+1
ADC temp2+1
STA temp+1
LDX temp2
LDY temp2+1
PLA
STA temp2+1
PLA
STA temp2
LDA pointer
CLC
ADC #$20 ; !!! Variation for scrolling
STA pointer
LDA pointer+1
ADC #$00
STA pointer+1
DEC temp2+1
BNE .1
RTS
cls:
LDA #$80
.1:
PHA
LDX ppu_pointer
CMP #$8F
BNE .2
LDA #$00
BEQ .3
.2: LDA #$20
.3: STA PPUBUF+3,X
LDA #$40
STA PPUBUF+2,X
LDA #$00
STA PPUBUF,X
PLA
STA PPUBUF+1,X
PHA
CLC
ROR PPUBUF+1,X
ROR PPUBUF,X
SEC
ROR PPUBUF+1,X
ROR PPUBUF,X
INX
INX
INX
INX
STX ppu_pointer
JSR wait
PLA
CLC
ADC #1
CMP #$90
BNE .1
RTS
update_sprite:
ASL A
ASL A
STA pointer
LDA #SPRITE_PAGE
STA pointer+1
LDY #0
LDA sprite_data+0
STA (pointer),Y
INY
LDA sprite_data+1
STA (pointer),Y
INY
LDA sprite_data+2
STA (pointer),Y
INY
LDA sprite_data+3
STA (pointer),Y
RTS
_abs16:
PHA
TYA
BPL _neg16.1
PLA
_neg16:
EOR #$FF
CLC
ADC #1
PHA
TYA
EOR #$FF
ADC #0
TAY
.1:
PLA
RTS
_sgn16:
STY temp
ORA temp
BEQ .1
TYA
BMI .2
LDA #0
TAY
LDA #1
RTS
.2: LDA #$FF
.1: TAY
RTS
_read16:
JSR _read8
PHA
JSR _read8
TAY
PLA
RTS
_read8:
LDY #0
LDA (read_pointer),Y
INC read_pointer
BNE .1
INC read_pointer+1
.1:
RTS
_peek8:
STA pointer
STY pointer+1
LDY #0
LDA (pointer),Y
RTS
_peek16:
STA pointer
STY pointer+1
LDY #0
LDA (pointer),Y
PHA
INY
LDA (pointer),Y
TAY
PLA
RTS
; temp2 contains left side (dividend)
; temp contains right side (divisor)
; 16-bit multiplication.
_mul16:
STA temp2
STY temp2+1
LDA #0
STA result
TAY
; Shift low-byte of multiplier
LDX #7
.1:
LSR temp2
BCC .2
LDA result
CLC
ADC temp
STA result
TYA
ADC temp+1
TAY
.2: ASL temp
ROL temp+1
DEX
BPL .1
; Shift high-byte of multiplier (temp is zero here)
TYA
LDX #7
.3:
LSR temp2+1
BCC .4
CLC
ADC temp+1
.4: ASL temp+1
DEX
BPL .3
TAY
LDA result
RTS
; 16-bit signed modulo.
_mod16s:
STA temp2
STY temp2+1
LDY temp2+1
PHP
BPL .1
LDA temp2
JSR _neg16
STA temp2
STY temp2+1
.1:
LDY temp+1
BPL .2
LDA temp
JSR _neg16
STA temp
STY temp+1
.2:
JSR _mod16.1
PLP
BPL .3
JMP _neg16
.3:
RTS
; 16-bit signed division.
_div16s:
STA temp2
STY temp2+1
LDA temp+1
EOR temp2+1
PHP
LDY temp2+1
BPL .1
LDA temp2
JSR _neg16
STA temp2
STY temp2+1
.1:
LDY temp+1
BPL .2
LDA temp
JSR _neg16
STA temp
STY temp+1
.2:
JSR _div16.1
PLP
BPL .3
JMP _neg16
.3:
RTS
_div16:
STA temp2
STY temp2+1
.1:
LDA #0
STA result
STA result+1
LDX #15
.2:
ROL temp2
ROL temp2+1
ROL result
ROL result+1
LDA result
SEC
SBC temp
TAY
LDA result+1
SBC temp+1
BCC .3
STY result
STA result+1
.3: DEX
BPL .2
ROL temp2
ROL temp2+1
LDA temp2
LDY temp2+1
RTS
_mod16:
STA temp2
STY temp2+1
.1:
LDA #0
STA result
STA result+1
LDX #15
.2:
ROL temp2
ROL temp2+1
ROL result
ROL result+1
LDA result
SEC
SBC temp
STA result
LDA result+1
SBC temp+1
STA result+1
BCS .3
LDA result
ADC temp
STA result
LDA result+1
ADC temp+1
STA result+1
CLC
.3:
DEX
BPL .2
LDA result
LDY result+1
RTS
; Random number generator.
; From my game Mecha Eight.
random:
LDA lfsr
ORA lfsr+1
BNE .0
LDA #$11
STA lfsr
LDA #$78
STA lfsr+1
.0: LDA lfsr+1
ROR A
ROR A
ROR A
EOR lfsr+1
STA temp
LDA lfsr+1
ROR A
ROR A
EOR temp
STA temp
LDA lfsr
ASL A
ASL A
EOR temp
ROL A
ROR lfsr+1
ROR lfsr
LDA lfsr
LDY lfsr+1
RTS
irq_handler:
RTI
nmi_handler:
PHA
TXA
PHA
TYA
PHA
if CVBASIC_BANK_SWITCHING
LDA $BFFF
PHA
endif
; Load sprites
LDA mode
AND #4 ; Flicker enabled?
BNE .5 ; No, jump.
LDA flicker
CLC
ADC #32
STA flicker
JMP .6
.5:
LDA #$00
.6:
STA OAMADDR
LDX #SPRITE_PAGE
STX SPRRAM ; Use DMA for sprite loading
; Screen changes
LDA ppu_pointer ; Any change?
BEQ .1 ; No, jump.
LDX #$00
.0: LDY PPUBUF,X
INX
LDA PPUBUF,X
INX
STA PPUADDR ; High-byte of VRAM address.
ROL A
STY PPUADDR ; Low-byte of VRAM address.
BCS .2 ; Fill routine.
BMI .7 ; Single byte routine.
; Copy routine.
LDA PPUBUF+1,X
STA ppu_source
LDA PPUBUF+2,X
STA ppu_source+1
LDY PPUBUF,X ; Negative counter.
INX
INX
INX
.4:
LDA (ppu_source),Y
STA PPUDATA
INY
BNE .4
CPX ppu_pointer
BNE .0
JMP .11
; Single byte
.7:
LDA PPUBUF,X
INX
STA PPUDATA
CPX ppu_pointer
BNE .0
JMP .11
; Filling data
.2:
LDY PPUBUF,X
INX
LDA PPUBUF,X
INX
.3:
STA PPUDATA
DEY
BNE .3
CPX ppu_pointer
BNE .0
.11:
LDA #0
STA ppu_pointer
.1:
; Final settings for PPU
LDA #0
STA PPUADDR
STA PPUADDR
LDA scroll_x
STA PPUSCROLL
LDA scroll_y
STA PPUSCROLL
LDA ppu_ctrl
LSR A
LSR A
STA ppu_temp
LDA scroll_y+1
ROR A
ROL ppu_temp
LDA scroll_x+1
ROR A
ROL ppu_temp
LDA ppu_temp
STA PPUCTRL
LDA ppu_mask
STA PPUMASK
LDA PPUSTATUS ; VDP interruption clear.
STA vdp_status
; Read controllers
LDA #$01
STA CONT1
STA cont_bits
LSR A
STA CONT1
.15: LDA CONT1
; LSR A
AND #3 ; So it works with Famicom
CMP #1
ROL cont_bits
BCC .15
JSR convert_joystick
STA joy1_data
STX key1_data
LDA #$01
STA CONT1
STA cont_bits
LSR A
STA CONT1
.16: LDA CONT2
; LSR A
AND #3 ; So it works with Famicom
CMP #1
ROL cont_bits
BCC .16
JSR convert_joystick
STA joy2_data
STX key2_data
if CVBASIC_MUSIC_PLAYER
LDA music_mode
BEQ .10
JSR music_hardware
.10:
endif
INC frame
BNE .8
INC frame+1
.8:
INC lfsr ; Make LFSR more random
INC lfsr
INC lfsr
if CVBASIC_MUSIC_PLAYER
LDA ntsc
BEQ .12
LDX music_tick
INX
CPX #6
BNE .14
LDX #0
.14: STX music_tick
BEQ .9
.12:
LDA music_mode
BEQ .9
JSR music_generate
.9:
endif
; This is like saving extra registers, because these
; are used by the compiled code, and we don't want
; any reentrancy.
LDA temp+0
PHA
LDA temp+1
PHA
LDA temp+2
PHA
LDA temp+3
PHA
LDA temp+4
PHA
LDA temp+5
PHA
LDA temp+6
PHA
LDA temp+7
PHA
;CVBASIC MARK DON'T CHANGE
PLA
STA temp+7
PLA
STA temp+6
PLA
STA temp+5
PLA
STA temp+4
PLA
STA temp+3
PLA
STA temp+2
PLA
STA temp+1
PLA
STA temp+0
if CVBASIC_BANK_SWITCHING
PLA
ORA CHRRAM_BANK
STA BANKSEL
endif
PLA
TAY
PLA
TAX
PLA
RTI
convert_joystick:
LDA #0
LDX #15
ROR cont_bits
BCC $+4
ORA #2
ROR cont_bits
BCC $+4
ORA #8
ROR cont_bits
BCC $+4
ORA #4
ROR cont_bits
BCC $+4
ORA #1
ROR cont_bits
BCC $+4
LDX #11
ROR cont_bits
BCC $+4
LDX #10
ROR cont_bits
BCC $+4
ORA #$40
ROR cont_bits
BCC $+4
ORA #$80
RTS
wait:
LDA frame
.1: CMP frame
BEQ .1
RTS
print_string_cursor_constant:
PLA
STA temp
PLA
STA temp+1
LDY #1
LDA (temp),Y
STA cursor
INY
LDA (temp),Y
STA cursor+1
INY
LDA (temp),Y
STA temp2
TYA
CLC
ADC temp
STA temp
BCC $+4
INC temp+1
LDA temp2
BNE print_string.2
print_string_cursor:
STA cursor
STY cursor+1
print_string:
PLA
STA temp
PLA
STA temp+1
LDY #1
LDA (temp),Y
STA temp2
INC temp
BNE $+4
INC temp+1
.2: CLC
ADC temp
TAY
LDA #0
ADC temp+1
PHA
TYA
PHA
INC temp
BNE $+4
INC temp+1
LDX ppu_pointer
LDA cursor
STA PPUBUF,X
LDA cursor+1
AND #$07
ORA #$20
STA PPUBUF+1,X
LDA #0
SEC
SBC temp2
STA PPUBUF+2,X
LDA temp
SEC
SBC PPUBUF+2,X
STA PPUBUF+3,X
LDA temp+1
SBC #0
STA PPUBUF+4,X
TXA
CLC
ADC #5
STA ppu_pointer
LDA temp2
CLC
ADC cursor
STA cursor
BCC .1
INC cursor+1
.1:
CPX #PPUSIZE-5
BCS .3
RTS
.3:
JMP wait
print_number:
LDX #0
STX temp
SEI
print_number5:
LDX #10000
STX temp2
LDX #10000/256
STX temp2+1
JSR print_digit
print_number4:
LDX #1000
STX temp2
LDX #1000/256
STX temp2+1
JSR print_digit
print_number3:
LDX #100
STX temp2
LDX #0
STX temp2+1
JSR print_digit
print_number2:
LDX #10
STX temp2
LDX #0
STX temp2+1
JSR print_digit
print_number1:
LDX #1
STX temp2
STX temp
LDX #0
STX temp2+1
JSR print_digit
CLI
RTS
print_digit:
LDX #$2F
.2:
INX
SEC
SBC temp2
PHA
TYA
SBC temp2+1
TAY
PLA
BCS .2
CLC
ADC temp2
PHA
TYA
ADC temp2+1
TAY
PLA
CPX #$30
BNE .3
LDX temp
BNE .4
RTS
.4: DEX
BEQ .6